YOLOv6-S (ONNX) β Renesas X5H
Introduction
This repository hosts YOLOv6-S, targeting the Renesas R-Car X5H platform for object detection inference on the NPX6 NPU.
Note: The other YOLOv6 sizes (
YOLOv6-M-ONNX,YOLOv6-L-ONNX) each have their own sibling repo.
- Model Architecture: YOLOv6, SyncBN, "fast" training recipe
- Source Model: OpenMMLab config
yolov6_s_syncbn_fast_8xb32_300e_coco(no HuggingFace mirror of these weights; seemodel.sourcein.metadata.yaml) - Task: Object Detection
- Dataset: COCO (inferred from checkpoint name)
- Input Resolution: TBD
- Parameters: 18.5M
Deployment Flow
The FP32 ONNX model is auto-cast to INT8 by the Renesas MWMX toolchain at compile time β no separate quantization step is required.
yolov6s_..._optimized.onnx (FP32)
β
βββΆ MWMX Runtime βββΆ INT8 auto-cast βββΆ NPX6 NPU
Provided Artifacts
| Artifact | Status | Notes |
|---|---|---|
| FP32 (ONNX) | β | fp32/yolov6s.onnx β FP32 ONNX export |
Performance
Measured on Renesas R-Car X5H via the MWMX runtime (APM50 ship-performance CI pipeline).
Benchmark configuration: Single NPU Β· Batch size: 1 Β· Input resolution: TBD
| Runtime | Precision | Device | Latency (ms) | Type |
|---|---|---|---|---|
| MWMX Runtime | INT8 (auto) | X5H Β· 1Γ NPU Β· 1 Core Β· 850 MHz | 12.077511 | Measured |
| MWMX Runtime | INT8 (auto) | X5H Β· 1Γ NPU Β· 12 Cores Β· 850 MHz | 9.560201 | Measured |
Model Input
Input Tensor
- Shape: TBD β not available from source data (expected
(N, 3, H, W), RGB) - Format: TBD
- Data Type: TBD
- Pixel Range: TBD
Preprocessing
TBD β not available from source data.
Model Outputs
TBD β not available from source data. YOLOv6 produces multi-scale detection tensors that require decoding and Non-Maximum Suppression (NMS) postprocessing.
Postprocessing
- Anchor-free box decoding at each output scale
- Confidence threshold filtering
- Non-Maximum Suppression (NMS)
Accuracy
TBD β not yet measured/published for this repo.
Runtime Details
MWMX Runtime
- Engine: Renesas MWMX (Middleware MX) native inference runtime
- Input format: FP32 ONNX (compiled by the MWMX toolchain)
- NPU execution precision: INT8 (auto-cast by MWMX toolchain)
- Execution target: NPX6-48K NPU on R-Car X5H
Prerequisites
To run inference on Renesas R-Car X5H, you need:
- Renesas R-Car X5H board with NPX6 NPU
- Renesas MWMX Runtime
- Hugging Face CLI to download the model
Download
hf download Renesas/YOLOv6-S-ONNX --repo-type=model --include "fp32/*"
Benchmark Methodology
- HIL runs: Hardware-in-the-loop β measured on physical R-Car X5H silicon via the MWMX
runtime (
metawaremx_runtimeCI pipeline, "APM50" ship-performance target) - Precision: FP32 ONNX input; INT8 execution (auto-cast by MWMX)
- Slices: both 1-core and 12-core results reported